Without limiting the scope of the invention, its background is described in connection with current methods of forming electrical connections to high-dielectric-constant materials, as an example.
The increasing density of integrated circuits (e.g. DRAMs) is increasing the need for materials with high-dielectric-constants to be used in electrical devices such as capacitors. The current method generally utilized to achieve higher capacitance per unit area is to increase the surface area/unit area by increasing the topography, such as in trench and stack capacitors using SiO.sub.2 or SiO.sub.2 /Si.sub.3 N.sub.4 as the dielectric. This approach becomes very difficult in terms of manufacturability for devices such as the 256 Mbit and 1 Gbit DRAMs.
An alternative approach is to use a high permittivity dielectric material. To be useful in electronic devices, however, reliable electrical connections should generally be constructed which do not diminish the beneficial properties of these high-dielectric-constant materials.
Heretofore, in this field, single and multiple metal layers are generally used to form electrical contacts to high-dielectric-constant materials. For example, to provide an electrical connection to a high-dielectric-constant material which makes up a capacitor on the surface of a semiconductor substrate, the following techniques are among those now employed: (a) dielectric/platinum/substrate, (b) dielectric/platinum/tantalum/substrate, and (c) dielectric/platinum/titanium/substrate. The layering sequence in these examples is from the top down to the substrate (e.g. silicon). A similar metallization scheme may be used for the top of the dielectric film to complete the capacitor structure.